Intel Hub Architecture

(redirected from Accelerated Hub Architecture)

Intel Hub Architecture

Intel's architecture for the 8xx family of chipsets, starting with the 820. It uses a memory controller hub (MCH) that is connected to an I/O controller hub (ICH) via a 266 MB/sec bus. The MCH chip supports memory and AGP, while the ICH chip provides connectivity for PCI, USB, sound, IDE hard disks and LAN.

Because of the high-speed channel between the sections, the Intel Hub Architecture (IHA) is much faster than the earlier Northbridge/Southbridge design, which hooked all low-speed ports to the PCI bus. The IHA also optimizes data transfer based on data type. See Northbridge and Intel chipsets.

Intel Hub Architecture
Intel introduced its hub architecture starting with the 820 chipset, which divides control between a memory controller chip (MCH) and an I/O controller chip (ICH). This is an illustration of the 850.
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References in periodicals archive ?
STMicroelectronics (NYSE:STM) has announced the first device in a new family of application-specific Flash memories targeted at high performance PCs employing Intel's Accelerated Hub Architecture.
Standard Microsystems Corporation (SMSC) announced today the availability of its LPC47M13x and LPC47M14x System Controller Hub(TM) (SCH) devices, designed specifically for the next generation of PCs using the Intel Accelerated Hub Architecture.
The System Controller Hub(TM) is the next generation of Super I/O, which is complementary to the Intel Accelerated Hub Architecture and includes some legacy I/O features as well as additional logic valuable for new PC designs.
In addition to integrating technologies, the Intel 810 chipset adds new capabilities including Instantly Available PC technology, which allows computers to quickly resume operation with low levels of power, and Intel Accelerated Hub Architecture, which doubles the size of the communications channel within the chipset for better multimedia performance.

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