Intel Hub Architecture
(redirected from Accelerated Hub Architecture)Also found in: Acronyms.
Intel Hub Architecture
Intel's architecture for the 8xx family of chipsets, starting with the 820. It uses a memory controller hub (MCH) that is connected to an I/O controller hub (ICH) via a 266 MB/sec bus. The MCH chip supports memory and AGP, while the ICH chip provides connectivity for PCI, USB, sound, IDE hard disks and LAN.Because of the high-speed channel between the sections, the Intel Hub Architecture (IHA) is much faster than the earlier Northbridge/Southbridge design, which hooked all low-speed ports to the PCI bus. The IHA also optimizes data transfer based on data type. See Northbridge and Intel chipsets.
 |
| Intel Hub Architecture |
|---|
| Intel introduced its hub architecture starting with the 820 chipset, which divides control between a memory controller chip (MCH) and an I/O controller chip (ICH). This is an illustration of the 850. |