Block Diagram Compiler

Block Diagram Compiler

(simulation, language)
(BDL) A block diagram simulation tool, with associated language.

["A Software Environment for Digital Signal-Processing Simulations," D.H. Johnson & R.E. Vaughan, Circuits Systems and Signal Processing 6(1):31-43, 1987].
This article is provided by FOLDOC - Free Online Dictionary of Computing (foldoc.org)
Mentioned in ?
References in periodicals archive ?
New high-level block diagram compilers can produce FPGA bit streams that work reasonably well for prototypes or proof of concept," noted Hosking.
Two routes lead to software defined radio

Encyclopedia browser ?
Full browser ?