Chip Scale Packaging

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Chip Scale Packaging

(hardware)
(CSP) A type of surface mount integrated circuit packaging that provides pre-speed-sorted, pre-tested and pre-packaged die without requiring special testing. An example is Motorola's Micro SMT packaging.

See also: chip-on-board, flip chip, multichip module, known good die, ball grid array.

["Chip scale packaging gains at SMI. (Surface Mount International)", Bernard Levine, Electronic News (1991), Sept 4, 1995 v41 n2081 p1(2)].
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References in periodicals archive ?
Unlike existing plastic packages, wafer level Chip Scale packages will enable manufacturers to meet the performance and small form factor requirements of future miniaturized, handheld electronic devices.
The Ripcord[TM] SC3500 product family is offered in two packaging options, a complete System-In-Package (SiP) which provides a fully-integrated solution for simplified RF design and a high degree of manufacturability, and a Wafer-Level Chip Scale Package (WCSP) which provides a low-cost, small-form-factor option for module manufacturers and OEMs that have in-house RF expertise.
makers are scrambling to evaluate chip scale package alternatives and
Chip Scale Packages are four to ten times smaller than
Nasdaq:STAK), a major provider of high-density packaged memory stacking solutions, today announced at Denali MemCon San Jose the availability of its High Performance Stakpak(R) for stacking DDR2 and DDR1 DRAMs in Chip Scale Packages.
Pre-production quantities of the High Performance Stakpak are currently available for DDR2 and DDR1 DRAMs in Chip Scale Packages, and production quantities will be available in Q1 CY05.
For example, the cost of wafer level CSP is 20 percent lower than that of QFNs (Quad Flat No-lead), a die level chip scale package solution.
ASE)(TAIEX:2311)(NYSE:ASX), one of the world's largest semiconductor packaging and testing companies, announced today that it will launch volume production of wafer level chip scale packages (CSP) this quarter, ramping up to 2.
Table 17: World Long-Term Projections for Chip Scale Packages
Table 18: World 10-Year Perspective for Chip Scale Packages by
Table 17: World Long-Term Projections for Chip Scale Packages by Geographic Region - US, Canada, Japan, Europe, Asia-Pacific (excluding Japan), and Rest of World Markets Independently Analyzed with Annual Revenues in US$ Million for Years 2011 through 2015 (includes corresponding Graph/Chart) II-40
Table 18: World 10-Year Perspective for Chip Scale Packages by Geographic Region - Percentage Breakdown of Dollar Revenues for US, Canada, Japan, Europe, Asia-Pacific (excluding Japan), and Rest of World Markets for Years 2003, 2008 & 2012 (includes corresponding Graph/Chart) II-41