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Denali's Databahn DDR-SDRAM controller and synthesizable PHY IP is a complete solution ready to be integrated into SoCs and ASICs which interface with DDR memories.
We configured the Databahn core for a 64-bit interface to DDR-SDRAM running at 200 MHz, and it was fully functional at speed in first silicon.
Targeted at high-bandwidth applications, Databahn supports all high-speed memory technologies including DDR-SDRAM, FCRAM, and RLDRAM.
The task is further complicated by the need to adjust the memory access to the processing elements during the design process, and the need to support new and emerging high-speed DRAMs such as DDR-SDRAM, FCRAM, and RLDRAM.
To ensure compatibility with all the latest high-speed DRAM memory technologies, the configuration process is tightly integrated with a database of more than 4500 memory components, including the latest DDR-SDRAM, FCRAM, and RLDRAM components.
The development kit is a robust hardware platform that includes a high-capacity Virtex-II XC2V1500 or XC2V4000 FPGA, DDR-SDRAM memory, Flash memory, a PCI/PCI-X bus, and several Avnet Vertical expansion Bus (Avbus) connectors to provide all the components needed to quickly and easily create a complete system application.
In addition, FCRAM's highly segmented memory core uses less than half the power of DDR-SDRAM under the same conditions.
The Acuid family of robust and flexible memory module test products provides the advanced test solutions needed to test SDRAM, DDR-SDRAM SIMMs and DIMMs.
SOMA models for Micron's PC100 and PC133 SDRAM components and the latest DDR-SDRAM and RDRAM(R) (Rambus(R) DRAM) components are currently available on Micron's Website, www.