DRAM refresh

DRAM refresh

(storage)
The operation which cycles through a DRAM reading each row and writing it back again to compensate for the gradual leakage of charge from the capacitors which store the data. This may be done by the CPU but is often done by a dedicated memory controller.
References in periodicals archive ?
The contributors assess the impact of DRAM refresh on task execution times, define the temporal interface of a task pipeline by demand bound functions, and simplify execution time distributions via random sampling.
If DRAMs are used, the memory controller also performs DRAM initialization and DRAM refresh.
There is no need to worry about DRAM refresh, CAS and RAS, and all the other complications of DRAMs -- an address is put in and data comes out.