error-detecting code

error-detecting code

[′er·ər di‚tek·tiŋ ‚kōd]
(computer science)
References in periodicals archive ?
As basic test functions, generator error-detecting codes are proposed.
For example, to ensure that a local area network service has omission/performance failure semantics, it is standard practice to use error-detecting codes that detect with high probability any message corruption.
If the data link layer above the physical layer uses at least 2-bit error-detecting codes to detect message corruption and discards corrupted messages, then this failure is propagated as an omission failure at the data link layer.
If the elementary storage servers used to build S have read omission failure semantics (error-detecting codes ensure that the probability of read value failures caused by bit corruptions is negligible), one can implement S as follows: use two identical, physically independent elementary servers s, s'; interpret each S-write as two writes on s and s', and interpret each S-read as a read of s, and if the s-read results in an omission failure, a read of s'.
Assume that, to build S, one decides to use a duplex design based on two physically independent storage servers s, s' which use 1-bit error-detecting codes. The specification of these elementary storage servers is as follows: an s-read returns the value previously written with probability at least 1-f[.sub.s], where f[.sub.s] = 10[.sup.-9]; an s-write always succeeds; the probability that an s-read returns a value different from the one written is at most c[.sub.s] = 10[.sup.-19] (less than one in 10[.sup.10] s-read failures is a value failure); when an s-read value failure occurs, that is, the value read V is different from the value written V[.sub.0], V can be any value among 10[.sup.10] storage word values that are different from V[.sub.0].
If the requirement is to design a more reliable storage service S' with a specification as before, except that the probability of an S'-read value failure should be at most c[.sub.s] = 10[.sup.-20], then the duplex design based on the omission failure hypothesis for memories with 1-bit error-detecting codes is no longer adequate.
In order to detect failures in buses, communication lines, memory and disk servers, all the previously discussed architectures use error-detecting codes. This hardware failure detection technique is well understood.