# half-adder

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## half-adder

[¦haf ¦ad·ər] (electronics)

A logic element which operates on two binary digits (but no carry digits) from a preceding stage, producing as output a sum digit and a carry digit.

## half-adder

An elementary electronic circuit in the arithmetic logic unit (ALU) that adds one bit to another. The output is the result bit and the carry bit. Just like 9 + 1 derives 0 with a carry of 1, in binary, 1 + 1 yields the same results. See binary and ALU.INPUTS OUTPUTSBit Bit Result Carry1 2 Bit Bit0 + 0 = 0 0 0 + 1 = 1 0 1 + 0 = 1 0 1 + 1 = 0 1

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