As shown in Figure 1(a), a magnetic induction [B.sub.Z] and a bias current [I.sub.bias] are applied to the polysilicon CSHP and the positive and negative Hall voltages, [V.sub.H](+) and [V.sub.H](-), are induced by a Lorentz force [F.sub.X] in the x-direction.
According to the proposed SPICE model shown in the appendix, the simulated output Hall voltages are presented (Figure 10; dashed lines) as a function of the different biasing currents, from 100 [micro]A to 300 [micro]A in steps of 100 [micro]A, at different magnetic inductions, from -30 mT to 30 mT in steps of 5 mT.
Caption: FIGURE 10: Simulated and measured output Hall voltages as a function of high magnetic induction for the designed 1-D magnetic chip.
Caption: FIGURE 11: Simulated and measured output Hall voltages as a function of low magnetic induction for the designed magnetic chip.
As the Hall elements only produce a Hall voltage of approximately a few tens of microvolts, the offset voltage and noise can annihilate the effective Hall voltage signal.
In awake mode, the Hall voltage generated by an induced magnetic field was sampled, and it worked on a clock pulse of 1/1000 of a duty cycle.
The other comparator reflects the results of the comparison of Hall voltage and reference voltage.
Once again, the Lorentz force resulting from the applied magnetic field equals the Coulomb force, generating a Hall voltage [V.sub.H] across the device and a longitudinal voltage [V.sub.x] along the device; however, here the Hall voltage is no longer directly proportional to the magnetic flux density B.
The integral on the left is just the Hall voltage, which the Hall resistance divided by the total current.