Hardware Description Language


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hardware description language

[′här‚dwer di′skrip·shən ‚laŋ·gwij]
(computer science)
A computer language that facilitates the documentation, design, and manufacturing of digital systems, particularly very large-scale integrated circuits, and combines program verification techniques with expert system design methodologies.

Hardware Description Language

(language)
(HDL) A kind of language used for the conceptual design of integrated circuits. Examples are VHDL and Verilog.
References in periodicals archive ?
a leading provider of electronic system-level (ESL) and hardware description language (HDL) design solutions, announced today the delivery of Vista-PE(TM), a personal edition of Summit's Vista(TM) Integrated Development Environment (IDE) for SystemC.
a leading provider of electronic system-level (ESL) and hardware description language (HDL) design solutions, announced today that it welcomes Doulos, the global leader in the development and delivery of world class, market-leading SystemC methodology training, into its rapidly growing ESL & Embedded Systems Training Program.
a leading provider of electronic system-level (ESL) and hardware description language (HDL) design solutions, and Actis Design, LLC, the leader in SystemC linting tools, today announced their collaboration aimed at promoting SystemC coding styles that ensure increased productivity and high-quality, maintainable code.
a leading provider of electronic system-level (ESL) and hardware description language (HDL) design solutions, today announced the introduction of its newly created ESL and Embedded Systems Training Program aimed at simplifying and accelerating SystemC adoption.
Verific Design Automation today said that EVE (Emulation and Verification Engineering) has licensed its hardware description language (HDL) Component Software to serve as the register transfer level (RTL) front end for EVE's hardware-assisted verification platform.
The IEEE today announced that it has approved SystemVerilog, IEEE Std 1800(TM)-2005, as a new standard and has approved Verilog, IEEE Std 1364(TM)-2005, as a revision to the popular Verilog hardware description language (HDL).
The DO-254 Users Group focuses on the application of DO-254 guidelines and implementation issues in complex hardware designs using FPGAs, Hardware Description Languages (HDLs) and design tools.

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