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(Performance Optimization With Enhanced RISC CPU) A family of RISC-based CPUs that use the Power Architecture from IBM. The heart of IBM's midrange computer line (see Power Systems), as well as the Watson supercomputer, POWER chips are also used by Google and others. They share a common instruction set with PowerPC CPUs, which were developed by IBM, Apple and Motorola. Following is the evolution of POWER chips. See RISC, Watson, PowerPC and OpenPOWER Foundation.
                Word    Tran-   Number                Size   sistors   ofModel     Year (bits) (million) Cores

 POWER10   2020 est.
 POWER9    2017 est.

 POWER8    2014   64     4200     8/12
 POWER7+   2012   64     2100    4/6/8
 POWER7    2010   64     1200    4/6/8
 POWER6    2007   64      790      2
 POWER5    2004   64      276      2
 POWER4+   2002   64      180      2
 POWER4    2001   64      174      2
 POWER3-II 2000   64       23      1
 POWER3    1998   64       15      1

 POWER2    1993   32       15      1
 POWER1    1990   32        .8     1

An Eight-Core POWER Chip
In 2010, IBM debuted its POWER7 generation with up to eight processing cores. Providing four threads per core, a 32-chip POWER7 computer processes 1,024 simultaneous instruction streams. (Image courtesy of IBM.)
References in periodicals archive ?
PCIe is an even greater bottleneck between the GPU and IBM POWER CPUs, which have more bandwidth than x86 CPUs.
The OpenPOWER Consortium brings together an ecosystem of hardware, system software, and enterprise applications that will provide powerful computing systems based on NVIDIA GPUs and POWER CPUs, said Sumit Gupta, general manager of the Tesla Accelerated Computing Business at NVIDIA.
Intersil's new ISL6563 universal multiphase PWM controller is the industry's only two-phase synchronous-buck PWM controller with integrated 2-A MOSFET drivers and "all-in-one VID" that is designed to power CPUs across most Intel and AMD processor-based platforms.
Through close collaboration with IBM and the OpenPOWER Foundation, Xilinx is continuing to develop high-performance compute solutions that integrate IBM POWER CPUs using the CAPI protocol with Xilinx FPGAs.