RISC


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RISC

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RISC

RISC

(Reduced Instruction Set Computer) A computer architecture that reduces chip complexity by using simpler machine instructions. In order to execute the equivalent comprehensive instructions found in traditional CISC computers (complex instruction set computers), such as Intel's ubiquitous x86 line, compilers for RISC hardware have to generate multiple RISC instructions. The most widely used RISC microprocessors are the ARM CPUs found in every smartphone and almost every tablet.

RISC and CISC Are Both Thriving
Although RISC designs date back to the 1960s, commercial RISC CPUs from MIPS and Sun became popular in the late 1980s. When introduced, RISC CPUs were faster than their CISC counterparts; however, advancements in CISC technology over the years narrowed the performance advantage. Ever-increasing clock speeds and enhanced architectures made CISC CPUs more powerful, and Windows caused the Intel CISC-based x86 market to grow exponentially in the 1990s. Even after a decade of use, Apple switched its Macs from RISC to CISC (see Mactel). Nevertheless, due to the low power consumption of RISC CPUs, smartphones and tablets (except for Windows tablets) are almost exclusively RISC-based ARM chips. See x86 and ARM.


No Microcode Conversion
RISC processors have no microcode conversion overhead. RISC keeps instruction size constant and bans indirect addressing, retaining only those instructions that can be overlapped and made to execute in one machine cycle or less. See microcode, indirect address and compiler.
References in periodicals archive ?
Patterson, one of the earliest advocates of a simple approach to computer architecture, and his group at the University of California at Berkeley have in the last three years designed and fabricated three experimental RISC chips that, according to a variety of tests, really do run faster than more sophisticated computers.
As standard offerings from Intel and AMD move to include multi-core, 64-bit processors, x86 system performance in comparison to RISC ceases to be an issue.
Conventional RISC architectures, with their internally pipelined structures, have benefited from decades of research and development, and have evolved into very efficient and extremely popular modes of computation," Nunally added.
The dual-mode RTXC/dm from Quadros is the first RTOS to elminate this problem by enabling optimized real-time execution for both RISC and DSP code.
and SAN DIEGO -- ARC International (LSE:ARK), a world leader in configurable RISC CPU/DSP processor cores and application platforms for digital media, consumer and communications devices, today announced its collaboration with Express Logic, Inc.
the CPU IP supplier of high-performance multimedia RISC CPU cores, today announced that its SH-4 RISC CPU core has been used in the verification of a new SoC (System on a Chip) design methodology developed by STARC (Semiconductor Technology Academic Research Center) of Japan.