There are two categories of CMOS RS flip-flops in the simulation, CMOS RS flip-flop composed of two cross-coupled NOR gates and two cross-coupled NAND gates.
Effects of microwave electromagnetic interference on CMOS RS flip-flops need to be studied.
In this paper, device simulation studies on the effects of CMOS RS flip-flops under microwave electromagnetic interference are presented.
Effects of microwave electromagnetic interference on CMOS RS flip-flops are studied by varying parameters of microwave electromagnetic interference pulse.
The validity of SDS is verified using commercial software MEDICI  before investigating the effects on CMOS RS flip-flops. Flip-flop 2 (as shown in Figure 1(b)) is modeled and simulated identically in MEDICI and the simulator, where the structures of MOS devices are presented in Table 1.
This section discusses the effects of microwave electromagnetic interference on CMOS RS flip-flops from the aspects of frequency and pulse width by examining the input/output characteristics and the behaviors of carriers in MOS devices.
In this section a slightly more substantial piece of hardware design is considered: a single-element RS flip-flop. This is a unit from which more complicated designs may easily be constructed, and it is important to get the basic design right.
The single element RS flip-flop is a unit with two boolean inputs S and R ("set" and "reset," respectively) and two boolean outputs Q and [Mathematical Expression Omitted].
The general experience is of circuits in which a system clock discretizes the passage of time and what the RS flip-flop should do between clock pulses, as opposed to what a particular circuit does do, is not well established.
Under these conditions the formal specification for the RS flip-flop can be as follows:
In the present case we can apply it to replace the specification with the recursive form that corresponds to the classical RS flip-flop design, because the latter satisfies the specification: