soft error


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soft error

[′sȯft ′er·ər]
(computer science)
An error that occurs in automatic operations but does not recur when the operation is attempted a second time.

soft error

A temporary disruption of a memory cell that causes its content to change from 0 to 1 or 1 to 0. The cause may be radioactive decay within the chip itself or cosmic rays from outer space. Without error correction built into the hardware, a soft error within a string of data may go unnoticed, unless financial amounts are involved. If an instruction resides in the faulty cell, or if the cell contains codes and settings used by the software, the program may crash or produce erroneous results. The remedy for soft errors is a cold boot. Contrast with hard error. See cold boot, parity checking and ECC memory.
References in periodicals archive ?
The topics include the co-synthesis of real-time embedded systems, methods for non-intrusive dynamic application profiling and soft error detection, the range of benchmarks required to analyze embedded processors and systems, on-demand communication topology updating strategy (OCTOPUS) for mobile sensor networks, game-theory models for selecting the camera in a video network, and an algorithm and sensitivity analysis for an ensemble-based approach to targeting mobile sensor networks.
Soft error occurs when radiation particle strikes sensitive area of the memory element.
Their topics include the effects of hydrogen on the radiation responses of field-oxide field-effect transistors and high-K dielectrics, radiation-hard voltages and current references in standard CMOS technologies, characterizing the real-time soft error rate of advanced SRAMs, autonomously detecting and characterizing radiation-induced transients in semiconductor integrated circuits, and fault-injection techniques for analyzing dependability.
lt;/p><p>The Cortex-A15 extends the capabilities of the Cortex-A family, adding hardware support for OS virtualisation, soft error recovery, larger memory address ability and system coherency, according to ARM.
Through the accurate and fast assessment of soft error rates, developers of advanced semiconductors can be advised on the optimal countermeasures to take, depending on where and how the LSIs will be used.
The 1T-SRAM-R technology has been proven to dramatically reduce soft error rates (SERs) to fewer than 10 FIT/Mb in 0.
IBM estimate that for every 256MB of memory you'll get one soft error a month.
IRPS Conference -- IROC Technologies([R]), developers of the industry standard for integrated circuit (IC) soft error analysis and prevention, will introduce TFIT 2 at the IEEE International Reliability Physics Symposium (IRPS 2012) in Anaheim, CA from April 15th to 19th.
para]]36Mb Synchronous SRAMs Offer Industry's Lowest Soft Error Rate; Deliver Lower Power Consumption and Pin-to-Pin Compatibility to Existing Devices[[/para]]
Topics include defect and fault tolerance (including papers on using architectures for yield improvement and coping with obsolescence), dependability analysis and evaluation (including a network fault model, obtaining microprocessor vulnerability data), hot topics (Trojan horse detection, soft error susceptibility in nanoscale CMOS), design for testability (optimizing full coverage and the impact of default tolerant BIST), reliability and fault tolerance (material fatigue, design-space exploration), error detection and correction (adaptive error control, error detection logic), testing techniques (core chest wrapper design, heuristics-dependent observation), and testing for timing and parametric failures.
In addition, the companies have agreed to collaborate on manufacturing activities, including built-in self-test (BIST) and repair; and will co-develop new solutions to challenges of deep sub-micron embedded memory, including soft error upset.