strained silicon


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strained silicon

A technique that deposits silicon (Si) on top of silicon germanium (SiGe) for making transistors on a chip. In so doing, the silicon atoms are stretched ("strained") to line up with the silicon germanium atoms, which are wider apart. This causes less resistance in the silicon and increases performance. AmberWave Systems Corporation, Salem, NH (www.amberwave.com) is a pioneer in this technology. In 2003, IBM announced it could make strained silicon with silicon crystals instead of germanium, making it considerably easier to manufacture. See silicon germanium.


Strained Silicon
When the silicon is adhered to the silicon germanium, the silicon atoms are stretched.
References in periodicals archive ?
The project aims at establishing a distributed pilot line between 2 companies: - Soitec for the fabrication of advanced engineered substrates (UTBB: Ultra Thin Body and BOx (buried oxide)) without and with strained silicon top film.
The semiconductor analyst David Kanter offers an interesting post in his real world technologies blog that describes how innovations such as strained silicon, high-k gate dielectrics (Hf02) and metal-gate electrodes, double-patterning, and FinFETs have brought us from 90 nm to where we are today, with Intel pursuing the 10-nm node.
They focus on MOSFETs implemented in high-mobility substrates such as germanium, silicon germanium, strained silicon, and ultra-thin germanium-on-insulator platforms combined with high-k insulators and metal-gate.
Here researchers in chemistry, materials, physics, and other disciplines report their research and review the literature on such aspects as the nano-scale characterization and spectroscopy of strained silicon, bone inspired nanocomposites, ultra-nanocrystalline diamond/amorphous carbon nanocomposite films, periodic non-oxide semiconductor-based organic-inorganic nanocomposites, and flexible transparent conducting nanocomposites.
Intel's 65nm processes combine higher-performance and lower-power transistors, a second-generation version of Intel's strained silicon, eight high-speed copper interconnect layers and a low-k dielectric material, the company claims.
He joins Coventry-based AdvanceSis from Aixtron, where he was director of sales and marketing for Silicon Technology, being responsible for all aspects of SiGe, strained silicon and other silicon platforms.
IQE has also been developing its strained silicon tech- nology, which can be used to make faster computers, and believes that it is in a position to take a dominant role in this new market.
The deal gives AMCC access to all of the advanced copper, SOI, strained silicon, and low-k chip making processes and the system on a chip technologies that IBM will be developing for future devices and systems.
7TH INNING STRETCH Strained silicon has become ready for the production line at just the right time.
IBM has developed the first transistor using strained silicon directly on insulator (SSDOI) technology that provides high performance while eliminating manufacturing problems.
The Intel chips will use a number of promising chip technologies, including strained silicon, 50nm (gate length) transistors, copper interconnects, and a new low-k dielectric material called carbon-doped oxide (CDO) which, according to Intel, increases signal speed inside the chip and also reduces power consumption.