TILE-Gx

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TILE-Gx

A multicore system-on-chip (SoC) family from Tilera Corporation (www.tilera.com). Targeting networking, video and datacenter applications, and running a symmetric multiprocessing (SMP) version of Linux, TILE chips are based on an architecture from MIT. The first chip was a 64-core CPU in 2007 (TILE64).

Multiple Caches and a Switch Fabric
Each core has its own L1 and L2 caches and a switch that connects them to each other (a "tile" comprises a core, cache and switch). The chip also contains controllers for memory, Ethernet, PCI Express and serial I/O. All tiles can access the caches of all the other tiles, providing a third cache layer. The chips come with an Eclipse-based software development environment, which includes a C compiler, command line interfaces and simulation and profiling tools for multicore applications.


Seventy-Two Cores
Tilera's Gx8072 chip has 24 lanes of PCI Express and up to 100 Gbps of Ethernet I/O. (Image courtesy of Tilera Corporation, www.tilera.com)







Tilera's First Chip
This block diagram of the TILE64 chip shows the makeup of each core (top). (Images courtesy of Tilera Corporation, www.tilera.com)
References in periodicals archive ?
Tilera has been shipping multicore processors since 2007 and has two product lines: TILE64 and TILEPro processors, with another -- the TILE-Gx line -- planned for early 2011.