Tri-Gate transistor

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Tri-Gate transistor

An Intel 3D transistor design introduced in 2011 with its Ivy Bridge microarchitecture. The Tri-Gate design is considered 3D because the gate wraps around a raised source-to-drain channel, called a "fin," instead of residing on top of the channel in the traditional 2D planar design. In addition, multiple fins are used, which provide greater control of each state. See Ivy Bridge, transistor and transistor concept.

Better Performance
Because the gate wraps around the fin (channel), the Tri-Gate transistor provides greater performance and less current leakage. Multiple fins are ganged together through the same gate to enable more current in the "on" state and less current in the "off" state. (Images courtesy of Intel Corporation.)

Six Fins Each
The matrix (center) on this chip is an actual image of three transistors and six fins. The drains from the first become the sources for the second, and so on. Metal layers interconnect all the source, drain and gate elements to complete the circuit design. (Image courtesy of Intel Corporation.)
References in periodicals archive ?
The combination of Intel's cutting-edge 3-D tri-gate transistor technology and architectural enhancements help make possible up to double the 3-D graphics and HD media processing performance compared with Intel's previous generation of chips.
Intel's 3-D Tri-Gate transistor technology and 22nm manufacturing process provides significant benefits over legacy planar designs," said Jim Finnegan, senior vice president of engineering at Netronome.
Just as skyscrapers let urban planners optimize available space by building upward, Intel's 3-D Tri-Gate transistor structure provides a way to manage density.
Achronix builds application targeted field programmable gate arrays (FPGAs) built on Intel's 22nm, 3-D Tri-Gate transistor technology.
Tri-gate transistors are likely to play a critical role in Intel's future energy efficient performance capabilities because they offer considerably lower leakage and consume much less power than today's planar transistors.
May 1, 2013 /PRNewswire/ -- Microsemi Corporation (Nasdaq: MSCC), a leading provider of semiconductor solutions differentiated by power, security, reliability and performance, today announced it is leveraging Intel Corporation's (Nasdaq: INTC) industry-leading, onshore foundry technology for the development of advanced high-performance digital integrated circuits (ICs) and system-on-chip (SoC) solutions using Intel's revolutionary 22 nanometer (nm) 3-D Tri-Gate transistor technology.
Since originally announced last year, Intel researchers have successfully shrunk the size of the tri-gate transistor (measured by the gate length) from 60 nanometers (nm) to 30 nm.
Intel's tri-gate transistor employs a novel 3-D structure, like a raised, flat plateau with vertical sides, which allows electronic signals to be sent along the top of the transistor and along both vertical sidewalls as well.
Tri-Gate transistors, which have only been in development at Intel for the last decade, improve performance and energy efficiency in the company's Core line of chips, starting with Ivy Bridge processors released in 2012.
Intel will further accelerate the Ultrabook innovation in 2012 with third generation Intel Core processors, codenamed "Ivy Bridge," with the help of its 22nm 3D tri-gate transistors.
The certified Cadence tools offer a complete and integrated flow for our customers, so they can implement and verify differentiated SoCs on Intel's 14nm design platform utilizing the second generation of tri-gate transistors," said Ali Farhang, vice president, Design Enablement and Services, Intel Custom Foundry.
These SoCs are based on the Intel Silvermont microarchitecture, utilizing Intel s industry-leading 22nm process technology with 3-D Tri-Gate transistors, which deliver significant improvements in computational HMI performance and energy efficiency.

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