VLIW


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VLIW

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VLIW

(Very Long Instruction Word) A CPU architecture that reads a group of instructions and executes them at the same time. For example, the group (word) might contain four instructions, and the compiler ensures that those four instructions are not dependent on each other so they can be executed simultaneously. Otherwise, it places no-ops (blank instructions) in the word where necessary.
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References in periodicals archive ?
Lauwereins, "ADRES: an architecture with tightly coupled VLIW processor and coarse-grained reconfigurable matrix," in Field Programmable Logic and Application, P.
Valero, "Modulo scheduling with integrated register spilling for clustered VLIW architectures," in Proceedings of the 34th Annual International Symposium on Microarchitecture (MICRO-34 '01), pp.
Guerrieri, "A VLIW processor with reconfigurable instruction set for embedded applications," IEEE Journal of Solid-State Circuits, vol.
In a clustered VLIW architecture, the FUs and register files are divided into several smaller groups.
[18] extended his analysis by measuring the performance of compiled C code when using one through eight instruction issue slots of a hypothetical family of VLIW [7] processors.
However, in the presence of multiple pipelines, this form of latency is very useful in practice, since it can be used to encode anti dependence introduced by the use of shared resources.(4) For example, if operation i precedes operation j in the linearized program, and i reads from some register r and j writes to the same, i and j can be issued concurrently in the same VLIW packet without violating the program semantics, since registers are read at the beginning of the execution cycle while results are written back at the end of the same cycle.
The first time a fragment of Java code is executed, the JIT compiler transparently converts the Java bytecodes into optimized RISC primitives for a Very Long Instruction Word (VLIW) parallel architecture.
A Crusoe processor uses a Very-Long Instruction Word (VLIW) instruction set at its core; CM software is responsible for the translation of x86 instructions to VLIW so that they can be processed by the CPU.
Transmeta also designed a so-called VLIW (very long instruction word) engine, which improves performance and saves power.
Utilizing VLIW Supercomputer technology, the product features an on-board high-speed processor dedicated to video functions.
The MAP1000 architecture is designed to replace hard-wired multimedia engines as well as conventional microprocessors by integrating high-performance imaging into an advanced very-long instruction word (VLIW) Central-Processing Unit (CPU).