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branch delay slot

branch delay slot

This article is provided by FOLDOC - Free Online Dictionary of Computing (foldoc.org)
References in periodicals archive
We therefore tried to avoid all special or hidden processor resources.(2) Thus, the Alpha AXP architecture has no condition codes, no global exception enables, no multiplier-quotient or string registers, no branch delay slots, no suppressed instructions or skips, no precise arithmetic exceptions, and no single-byte writes to memory.
The Alpha AXP architecture has no branch delay slots. The branch delay slots found in some other RISC architectures require exactly one following instruction to be executed after a conditional branch.
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