adder circuit

adder circuit

[′ad·ər ‚sər·kət]
(computer science)
References in periodicals archive ?
For adder circuit, if inputs A, B, and C are zero, the output values for Sum (S) and Carry (C) are 0, separately.
Here, it is easy to determine the input "A" from "P," input "B" from "P" and "Q," input "C" from "P," and "Q" and "R." In this article, authors at first have designed an optical Peres gate using polarization switch (PSW), and then they have also designed optical full adder circuit using two such Peres gates and subsequently a data recovery circuit which can recover the input data of the adder.
In Section 3, a fast adder circuit 74283 is applied as a case study to illustrate and validate the proposed method.
The choice of the multiplier and adder circuit also affects the resultant power dissipation.
The complete filter can be evaluated in 12 XO clock cycles, reserving two clock cycles for every addition, which leaves enough time for ripple carry propagation in the adder circuit.
Power consumption savings as observed in 8bit RCA and 1-bit full adder are 95% and 88%, respectively, whereas propagation delay has been reduced by almost 99% in both RCA and full adder circuit.
4(a) shows the concept upon which the all-optical full adder circuit is designed [33].
The offset circuit, placed after the integrator, consists of an adder circuit and through a manual adjustment, allows a DC level to be subtracted from the detected signal.
From Figure 10 and Figure 11, the 10T adder circuit has less power consumption than the other circuits.
"We are attempting here in my group at MITRE to build upon such work by fabricating a molecular electronic adder circuit that uses such diodes for switching," Ellenbogen says.
In the final stage carry propagation adder circuit has been designed that consists of two Peres gates as reversible half adder and two HNG gates as reversible full adder.