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The use of scan registers to capture state from device input and output pins. IEEE Standard 1149.1-1990 describes the international standard implementation (sometimes called JTAG after the Joint Test Action Group which began the standardisation work).
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scan technologyA method for testing chips on the printed circuit board by building the chip with additional input and output pins that are used only for test purposes. Full scan methods test all the registers on the chip. Partial scan tests some of them, and boundary scan tests only the input/output cells. JTAG is the IEEE standard for boundary scan. See also scan rate.
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