bus cycle

bus cycle

[′bəs ‚sī·kəl]
(computer science)
A single transaction between the main memory and the CPU.
References in periodicals archive ?
Working with TfL led to the development of the Millbrook London Transport Bus Cycle (MLTB), used to evaluate all buses purchased on behalf of the authority.
HBM says enabling torque and rotational speed signals as well as angle of rotation and power to be digitally transmitted to PROFINET, the hardware supports Real Time Classes RT Class 1 and RT Class 3 (IRT) with a bus cycle time of up to 4 kHz.
An intelligent system, it is designed to be employed in a Master-Slave system where a single AS-Interface Master can exchange I/O data with up to 62 AS-Interface Slave devices and each Slave can transfer up to four inputs and four outputs on a bus cycle.
Since a bus cycle takes two clocks, the phase signal is used to identify the first clock period.
For the current family of Intel processors, it takes two processor cycles to execute one bus cycle (P/B ratio).
The E100 works with new and future devices in the M16C, H8SX, H8S, H8, and R8C families of 8- to 32-bit CISC (Complex Instruction Set Computer) devices and allows real-time in-circuit emulation at bus cycle speeds up to 130MHz.
Hardware design teams will want to take advantage of this free evaluation to experiment with the clock-cycle accurate, pipeline-modeling instruction set simulator and the associated performance modeling visualization views within the graphical user interface that show pipeline activity, cache utilization rates, and cycles spent on bus cycle activity.
With large memory buffers containing fine granularity, fast bus cycle times and built-in support for flow control, the LAN9118 can support extremely high data rates with little or no packet loss.
Users can purchase a software upgrade for $695 that includes the performance analysis features, deeper on-chip trace support, including bus cycle information, and additional hardware triggers.
In lab tests running UDDS, Steady State and NYC Bus Cycle modes the Rentar demonstrated superior fuel savings ranging from 5.
Novas has developed an intuitive environment for transaction waveform viewing, protocol checking, and bus cycle analysis that eases debug of standard (e.
Cummins (NYSE:CUM), the maker of diesel engines, is seeing evidence of an improving truck and bus cycle.