capacitive loading

capacitive loading

[kə′pas·əd·iv ′lōd·iŋ]
(electromagnetism)
Raising the resonant frequency of an antenna by connecting a fixed capacitor or capacitors in series with it.
Lowering the resonant frequency of an antenna by installing a capacitance hat.
References in periodicals archive ?
Dielectric material Shorting Radiator structure [5] Taconic Yes Capacitive loading [6] Rogers 3010 -- Capacitive loading [7] Alumina Yes Multilayer [9] Rogers 3210 Yes [pi]-shaped patch and multilayer [8] Rogers 3210 Yes Spiral patch [11] Rogers 3010 Yes Loop [12] FR4 Yes J-shaped patch This work Rogers 3010 -- Loading stubs
The adjustable compensation network at the input allows test engineers to tune the signal transmission lines within their fixed-connectivity test systems just as an engineer using a probe to manually test circuits would while also lowering capacitive loading compared to standard BNC and SMA cables.
While the idea of capacitive loading of periodic structures and the corresponding slowing down of waves is not new [16], we demonstrate its effectiveness in the 2D case for all directions of propagation and we outline its applications to the noise mitigation problem.
For illustration purposes, the delay and power variations with the flip-flop input capacitance with respect to different process corners at 65 nm CMOS technology for m[C.sup.2]MOSff1 are demonstrated in Figures 20 and 21, respectively, at 16X capacitive loading. Both m[C.sup.2]MOSff1 and m[C.sup.2]MOSff2 showed correct circuital behaviour at the aforementioned process nodes which indicates that no internal noise violations exist especially due to the fact that logic levels are retained even at FF process corner.
Firstly, we propose to cut the voids and adjust the size of the voids above and beneath the via-pads in order to reduce the capacitive loading. Second, we study the pad size and various micro-via stacking schemes for routings in the build-up layers.
The various techniques used in the past for the miniaturization of Wilkinson Power Divider involve 3D techniques [1], Planar artificial transmission lines [2], Capacitive loading [3], stepped impedances [4], large inductance through the application of transverse slits [5], substitution of quarter wave section with lumped parameters [6,7], varacter tuning [8], open stub technology [9], periodically loaded stubs [10] etc.
The proposed capacitive loading can extend the electrical length of stubs effectively, while reducing the physical length by up to 30%.
High capacitive loading can slow down signal edges while inductance from the probe ground-lead combined with capacitance from the probe input can form a series-resonant circuit that can appear as ringing.
Including the capacitive loading from the fringe fields to the anti-pads, the differential via impedance is approximately
Although ICs are available that provide both ESD protection and level shifting for the HDMI high-speed video/audio signal lines, as well as the two control channels, this removes the flexibility for designers to choose the best video/audio-protection IC offering the highest bandwidth and lowest capacitive loading. These characteristics are extremely important when protecting HDMI video/audio signal lines so as not to degrade signal integrity, leading to a poorer end-user experience.
X2Y typically uses less capacitance than normally required for filtering, resulting in less capacitive loading to the data line.
In order to minimize skew, it is imperative that line lengths and capacitive loading be matched within the signal pairs and then compared to skew between other pairs to minimize the signal pair to pair skew.