channel effect

channel effect

[′chan·əl i′fekt]
(electronics)
A leakage current flowing over a surface path between the collector and emitter in some types of transistors.
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References in periodicals archive ?
We also learned that pellet shape can make a difference in wound channel effect and the accuracy of a pattern.
Ceteris paribus, if a bank contracts its supply of installment loans, the revolving component may still increase as consumers rely on those loans to offset the traditional lending channel effect.
35[micro]mCMOS technology the pMOS transistors must be sized using short channel effect (SCE) (Zeki&Kuntman, 2000) and nMOS transistors using reverse short channel effect (RSCE) (Dragoi, 2010).
The channel effect on the quality of signal is a problem in transmission that should be considered in a communication system.
The other side was the same, except the middle of it was left untouched for that channel effect.
Understanding the radio channel effect on product performance is essential in research and development of wireless technologies.
Silicon proven device modeling of contour-based (non-rectangular) transistor gates which takes into account the short channel effect of a MOSFET inside the device channel in order to extract the proper device parameters.
We have evidence that Ranexa inhibits the late sodium channel in heart tissue and we believe that this late sodium channel effect is responsible for the suppression and elimination of arrhythmias we observed in this preclinical study," said Luiz Belardinelli, M.
CineNet Live provides a robust toolkit for pre-building productions, including alpha channel effects, layered source effects, and a library of 2D and 3D transitions.
To my knowledge, treatment of [fungal-related] ion channel effects has not been developed," Amman says.
More than ever, signal integrity issues due to crosstalk and channel effects such as intersymbol interference lead to closed eyes and jitter.
In order to control short channel effects and deal with other issues associated with the shrinking size of devices, there is talk of using 3D gate architecture for all semiconductor devices.

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