channel width

channel width

[′chan·əl ‚width]
(geology)
The distance across a stream or channel as measured from bank to bank near bankful stage.
(nuclear physics)
The part of the total energy width of a nuclear energy level that corresponds to a particular mode of decay.
References in periodicals archive ?
Control of channel width, enabled by flexible reconfigurable optical add-drop multiplexers (ROADMs), is also key to a flexible core network.
Conventional GAA based on nanowire requires a larger number of stacks due to its small effective channel width. On the other hand, Samsung's patented version of GAA, MBCFETao (Multi-Bridge-Channel FET), uses a nanosheet architecture, enabling greater current per stack.
Many other research studies were oriented on the optimization of cross-section area for flow channels, especially the channel width and the distance between two adjacent channels (channel ribs).
They showed that output and power consumption varied with the ratio of the square of the screw diameters [([D.sub.1]/[D.sub.2]).sup.2] when at the same screw rpm and channel depth for screws having the same geometry (channel width and flight width).
In the AARF-HT algorithm we add channel width, guard interval, spatial stream and maximum number of data rate index attributes.
where z, [n.sub.0], and a are the propagation distance, initial axial electron density, and plasma channel width, respectively.
Channel width (width of the conveyor) can be determined by:
Figure 4 shows the throughput result obtained for the channel width of 80 MHz; our results are plotted against the results obtained in [17] for throughput.
Constantinescu, Koken, and Zeng (2011) considered the flow in an open channel bend of strong curvature (the ratio between the radius of curvature of the curved reach and the channel width is close to 1.3) over realistic topography corresponding to equilibrium scour conditions.
[W.sub.eff] is effective channel width and for rectangular FinFET it is defined as
(6) Channel width, critical path, logic area, and total FPGA area for cluster sized N = 10 and 16
Figure 4(b) shows the effect of W on the trajectory of the left particle, which indicates that the left particle is always settling at about 0.175 of the channel width irrespective of the value of W.