cycle timing diagram

cycle timing diagram

[′sī·kəl ¦tīm·iŋ ‚dī·ə‚gram]
(computer science)
A diagram showing the activity that occurs in each clock cycle of a computer during the execution of a machine-language instruction.
McGraw-Hill Dictionary of Scientific & Technical Terms, 6E, Copyright © 2003 by The McGraw-Hill Companies, Inc.