For instance, DDS publishing is configured by simply drawing a graphic connection from the output of a decommutator
block to the DDS publisher block.
For support of a satellite that employs space ground link system (SGLS) communications, the real-time subsystem consists of a control central processing unit (CPU), IF receiver and subcarrier demodulator, telemetry bit synchronizer (with Viterbi decoder), pulse code modulation (PCM) decommutator and PCM simulator, Inter-range Instrumentation Group time code generator/reader and high performance small computer standard interface controller with real-time archival disk.
For example, the decommutator board uses the standard VME and VMEbus subsystem bus (VSB) interfaces for the movement of information.
The decommutator card then acquires frame and subframe synchronization and disassembles the recovered PCM stream.
Personal computer-based bit-synchronizers and decommutators are available from several sources.
These products include PCM decommutators, bit synchronizers, PCM simulators, demodulators, L&S band receivers, single board computers, DataXpress Telemetry System Software, as well as other hardware and software necessary for demanding telemetry solutions.
The system comprises two new state-of-the-art decommutators, each with a bit-synchronizer, IRIG time code reader, and PCM simulator on a single slot 6U sized VME board.
Thanks to its compact size, the PMC Decom saves system resources and delivers greater flexibility, all while supporting higher data rates than conventional decommutators
L-3's VME MFT processing module incorporates two bit synchronizers, two PCM decommutators
, two PCM simulators/encoders and an IRIG time code reader/generator.