equalizer circuit

equalizer circuit

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An electrical circuit that ensures that when two or more generators are connected in parallel to a power system they share the load equally. In this arrangement, if the voltage of one generator is slightly higher than that of the other generator in parallel, that generator will assume the greater part of the load. Such a circuit includes an equalizing coil wound with a voltage coil in each of the regulators, an equalizing bus to which all equalizing circuits are connected, and a low-resistance shunt in the ground lead of each generator. The equalizing coil will either strengthen or weaken the effect of the voltage coil, depending upon the direction. The low-resistance shunt in the ground lead of each generator causes a difference of potential between the negative terminals of the generators. The value of the shunt ensures a potential difference of 0.5 volt across it at the maximum generator load.
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This research successfully developed an equalizer circuit that compensates for distortions of the electric signals in low frequency as well as high frequency, and also a control circuit that automatically adjusts the compensation for each of several thousand signal lines in a system.
Key benefits of the Sabritec passive equalizer circuit include:
A simple printed circuit gain equalizer circuit has been described, which comprises a quarter-wave, line coupler, variable capacitance and selected resistor.
Through the development of a new kind of transceiver circuit, along with an equalizer circuit that can compensate for signal degradation in transmission lines, Fujitsu Laboratories has made it possible to roughly double data communications speed between CPUs.
The latter consists of 1) an equalizer circuit that compensates for signal degradation over transmission lines and 2) a receiver circuit that reads the original data from the restored signals (Figure 1).
While reducing gain at one band end, this equalizer circuit migh also decrease the output power capability and produce harmonic distortion.
Insertion loss of the amplitude equalizer can be calculated as a ratio of load current without equalizer to load current with the amplitude equalizer circuit in place.
Taking advantage of the characteristics of two different kinds of equalizer circuits(3), Fujitsu Laboratories has developed a new receiver equalizer control method that minimizes signal distortion resulting from transmission losses, and has built it into the receiver equalizer circuit. This receiver equalizer circuit supports 10Gbps transmissions over multiple channels and obviates the need for multi-stage equalizer circuits, resulting in numerous benefits: faster speed, lower power consumption, the ability to provide the loss-compensation necessary for backplane transmissions, and noise reduction.
A metamaterial was built to demonstrate the improvement by two coil layers and the phase lattice equalizer circuits experimentally.
In addition to the equalizer circuits, an Inter Symbol Interference (ISI) monitor, which is integrated into the eXAUI macro, enables adaptive control for parameter equalization, in order to compensate for loss through the transfer caused by cable length and other conditions.
Fujitsu Laboratories developed a technology that watches for and detects phase distortions that emerge over long backplane signal channels, and that can accurately correct data through applied control of signal-compensation circuits (equalizer circuits) on both the sending and receiving side.