error-correcting code

error-correcting code

[′er·ər kə¦rek·tiŋ ′kōd]
(computer science)
Data representation that allows for error detection and error correction if the error is of a specific kind.
References in periodicals archive ?
Leveraging Silicon Motion's proprietary NANDXtend(TM) error-correcting code (ECC) technology (which triples the P/E cycles for TLC NAND), the SM2256 delivers unparalleled, no-compromise performance, endurance and reliability for cost-effective, TLC-based SSDs.
So half of each chirp comprises an error-correcting code that ensures the message is received accurately.
The high-efficiency and high-integrity of the rate-14/15 Low-Density Parity-Check (LDPC) error-correcting code developed by Sony significantly decreases the amount of redundant data that is required for error correction, and this has enabled LDPC decoding at the world's lowest per-bit energy efficiency of 11.
The quantum error-correcting code provided the program for this process.
Keywords Quaternary cyclic code, self-orthogonal code, quantum error-correcting code.
It also stated the product maintains the 4 bit error-correcting code (ECC) capability of the 60nm NAND, enabling customers to use current system interfaces with minor firmware upgrades, helping ensure adequate reliability.
It includes optional error-correcting code (ECC) capability, allowing errors to be corrected on the fly.
Leveraging Silicon Motion's proprietary NANDXtend(TM) error-correcting code (ECC) technology, the SM2256 enhances the endurance and retention of TLC NAND, delivering more than three times better reliability for TLC SSD as compared to the existing BCH ECC schemes.
As well, the FW-7610 supports Error-Correcting Code (ECC) memory technology, giving it the ability to identify and correct memory automatically, while securing and stabilizing system performance.
In addition, it enhances stability and reliability by using two types of hardware error-correcting code (ECC) of Reed-Solomon (RS) and Bose-Chadhuri-Hocquenghem (BCH).
AMD (NYSE:AMD) today announced general availability of the AMD Opteron(TM) 100 Series processors that now feature error-correcting code (ECC) unbuffered memory support.
Triple Modular Redundancy and inference of error-correcting code RAMs reduces the effects of soft errors such as single-event upsets