feature size


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feature size

The size of the elements on a chip, which is used to measure and designate the chip generation at the fabrication level (process technology). Feature size, which today is measured in nanometers, is either the minimum distance between the source and drain on a MOS transistor or half the distance between cells in a dynamic RAM chip (known as "DRAM half pitch"). Certain elements within the transistor may even be smaller than the published feature size for a technology generation. See process technology, MOSFET, dynamic RAM and chip.
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"The lens determines the feature size you can make, and by replacing an old lens with this superlens, you could make smaller features at a lower cost.
Researcher Nears Creation of Superlens
The second-generation etch was able to help with the feature size reduction but not the uneven tone.
Short circuiting OSP / ENIG galvanic etch: an alternative approach to the etching process promises to open up the design window for mixed-metal finishes
As IC designers create more complex geometries with smaller features in mind, photomask sets prices will continue to rise, scaling up in cost from one node (feature size) to the next.
Building a sustainable future for photomasks: embattled by the IC downturn and an extremely competitive market space, the photomask industry gravitates towards smaller feature sizes, increased alliances, and some old-fashioned business remodeling for a much-needed reprieve
FIGURES 2F-J represent ink-jet printings showing minimum line feature size in the range of 75 to 100 microns and ~50 microns dot patterned.
Printable nanocomposites: advanced materials provide a low cost and highly versatile method for manufacturing flexible electronic circuits
While photolithography has been the primary driver over the past 40 years toward driving down feature size and increasing device densities in semiconductor devices, a number of basic materials technologies have been instrumental and, indeed essential, in supporting that trend.
Strained silicon: next step in boosting semiconductor performance: the continuing demand for smaller feature sizes and increasing device densities are driving development of advanced semiconductor fabrication technologies that continue the downward size spiral, while reducing power consumption and heat buildup.
Major breakthroughs with SEIMS, or Sandia Embedded Integrated Micromechanical Systems, are the achievement of functionality yields of [greater than]70%, compared to [less than]5% for some traditional integration techniques; and achievement of a 0.5 [[micro]meter] microelectronic feature size.
Semiconductor technology
With an STM, the feature size is maintained regardless of pattern geometry, indicating an absence of proximity effects.
Nanofabrication: how small can devices get?

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