fetch-execute cycle

fetch-execute cycle

(architecture, processor)
The sequence of actions that a central processing unit performs to execute each machine code instruction in a program.

At the beginning of each cycle the CPU presents the value of the program counter on the address bus. The CPU then fetches the instruction from main memory (possibly via a cache and/or a pipeline) via the data bus into the instruction register.

From the instruction register, the data forming the instruction is decoded and passed to the control unit which sends a sequence of control signals to the relevant function units of the CPU to perform the actions required by the instruction such as reading values from registers, passing them to the ALU to add them together and writing the result back to a register.

The program counter is then incremented to address the next instruction and the cycle is repeated.

The fetch-execute cycle was first proposed by John von Neumann.
This article is provided by FOLDOC - Free Online Dictionary of Computing (foldoc.org)

instruction cycle

The fundamental sequence of steps that a CPU performs. Also known as the "fetch-execute cycle," it is the process whereby a single instruction is executed. The first half of the cycle transfers the instruction from RAM to the instruction register (fetch) and decodes it. The second half executes the instruction. See machine language.
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References in periodicals archive ?
The fetch-execute cycle for each instruction is described as a series of register transactions.
By writing and executing LMC programs, students gain valuable experience with important ideas including the stored program concept and the fetch-execute cycle.