Anti-Collision Radar -- The floating-point arithmetic
executed by Diopsis' mAgic DSP is also useful for cost sensitive radar applications, such as automotive collision avoidance systems.
The dsPIC30F Math Library contains advanced single- and double-precision floating-point arithmetic
and trigonometric functions from the standard C header file.
True double-precision floating-point arithmetic
enables high audio sample and rendering rates under heavy loads.
The new core, included with Xilinx ISE(TM) software, enables customers to reduce component count, thus reducing overall system cost by performing the Floating-Point arithmetic
using the FPGA.
Ch is the first scripting language that supports C99 features such as complex numbers, variable length arrays (VLAs), IEEE-754 floating-point arithmetic
, and generic mathematical functions.
The Xilinx Floating-Point Operator core allows a range of floating-point arithmetic
operations that can be performed in an FPGA.
Support for IEEE 754 single and double precision floating-point arithmetic
is enabled through the use of XtremeData floating point libraries that are integrated directly into the Impulse C compiler flow and licensed separately by XtremeData.
The new derivatives also include 16KB of on-board ROM, with additional firmware features such as floating-point arithmetic
and I/O drivers.
Hardware-accelerated features include FEC, FFT/DFT, MiMO MMSE (Minimum Mean Square Error), and MLD (Maximum Likelihood Decoder) flexible equalizers, as well as matrix inversion made possible by floating-point arithmetic
and IRC (Interference Rejection Combining) receivers.
The additional instructions provide inter- and intra-vector integer and floating-point arithmetic
, as well as powerful logical, conditional, permutation, and data movement functions.
The library uses native floating-point arithmetic
support of the C67x DSP, and software simulates floating-point arithmetic
for fixed-point TMSC6000(TM) DSPs.
TM) SPE Instruction Set SIMD RISC/Single & double -precision floating-point arithmetic
/DMAC/MMU Memory Interface (XDR(TM) DRAM) 128MB(512Mbit x2), Physical Bandwidth of 12.