gate array

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gate array

An earlier type of ASIC chip that was partially finished with rows of unconnected transistors and resistors. The chip was completed by designing and adhering the top metal layers that provided the interconnecting pathways to form logic gates (NAND, NOR, etc.). These final masking stages were less costly than designing a full custom chip from scratch, which requires a new photo-mask for every transistor and interconnection layer. Gate arrays were superseded by field programmable gate arrays (see FPGA).

Basic Cells
The gate array was made up of cells containing a number of transistors and resistors. Using a cell library (gates, registers, etc.) and a macro library (more complex functions), the customer designed the chip, and the vendor's software generated the interconnection masks. Quite often, many cells went unused. See ASIC, PLD, hard macro and soft macro.


Gate Array Cells
These are examples of basic cells, one for CMOS only and another for CMOS and bipolar transistors. See CMOS and bipolar transistor.
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References in periodicals archive ?
Molex, a global manufacturer of electronic solutions, has announced the acquisition of BittWare, Inc., a global provider of computing systems featuring field-programmable gate arrays (FPGAs) deployed in data center compute and network packet processing applications, the company said.
The Field Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs) were also designed and manufactured at the Egyptian company.
These demonstrations, held in Japan and Germany, confirmed that 400GbE technology, including key elements such as field-programmable gate arrays (FPGAs) running Ixia intellectual property, CFP8 connectors, and optics, are available and ready to build the next generation of high speed networking products.
For hardware design engineers, system architects, and students specializing in the design of embedded systems based on field programmable gate arrays, Kirischian provides material to expand their vision of novel concepts in architecture organization and architecture virtualization in reconfigurable computing systems.
Compatible with NASAs existing satellite communications network, the highly modular hardware and software architecture is unique in its use of re-configurable field-programmable gate arrays (FPGAs), a first for SDR.
Divided into sections covering multiple-precision algorithms, transcendental methods, industrial practices, addition, floating point units, square-roots and reciprocal square-roots, high performance arithmetic for field programmable gate arrays, algorithms for cryptography and code certification, individual papers address detailed cutting edge technical topics.
The remaining papers are presented in sections on numerical algorithms, bio-informatics, image processing and visualization, GRID and cloud computing, programming, GPU and cell programming, compilers and tools, parallel input/output, communication runtime, benchmark and performance tuning, fault tolerance, adaptive parallel computing, DEISA (the Distributed European Infrastructure for Supercomputing Applications, parallel computing with field-programmable gate arrays, parallel programming tools for multi-core architectures, and programming heterogeneous architectures.
to make 28-nanometer field programmable gate arrays, or FPGAs, leaving behind its decade-long partner United Microelectronics Corp.
One result of the previous paper is a partnership between the Tour group and NuPGA (for "new programmable gate arrays"), a California company formed around the research to create a new breed of reprogrammable gate arrays that could make the design of all kinds of computer chips easier and cheaper.
Version 8.6 allows engineers to design advanced control systems using programmable automation controllers (PACs) based on field-programmable gate arrays (FPGAs).
Building on the inherent parallel nature of graphical programming, it delivers tools to help engineers and scientists take advantage of the benefits of multicore processors, field-programmable gate arrays (FPGAs) and wireless communication.