hard macro


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hard macro

The design of a logic function on a chip that specifies how the required logic elements are interconnected and specifies the physical pathways and wiring patterns between the components. Also called a "macro cell." Contrast with soft macro.
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References in periodicals archive ?
In 0.13um CMOS the CPU core is less than 1mm2 and the whole hard macro integrating CPU, FPU, 32K D cache, 16K I cache, serial port, timers, real time clock, interrupt controller, bus interface and debug port is only 8.2mm2.
Compliant to the ONFI 3.0 electrical interface, Arasan's ONFI 3.0 PHY, is designed to be delivered as a GDS II hard macro, and is process technology proven and easy to integrate.