level 1 cache

level 1 cache

[¦lev·əl ′wən ‚kash]
(computer science)

level 1 cache

References in periodicals archive ?
The temporal filtering effect from level 1 cache causes most of the blocks not to be referenced again in level 2 cache [6, 7].
The replacement policies in level 1 cache attempt to save the most recently used block closest to the CPU.
(5) Cache Level (CL): CL = {[cl.sub.1], [cl.sub.2], [cl.sub.3]}, where [cl.sub.1] stand for level 1 cache, namely, database cache; [cl.sub.2] stand for the second level cache, namely, the GIS server cache; [cl.sub.3] stand for Level cache, namely, the client cache.
These processors contain 128kB Level 1 cache and 64kB Level 2 cache.
A new technology called Execution Trace Cache offers a wrinkle in standard Level 1 cache design.
The 1.2GHz AMD Athlon processor is an x86-compatible, seventh-generation design featuring 256Kb of on-chip level 2 cache and 128Kb of on-chip level 1 cache, a fully pipelined superscalar floating point unit for x86 platforms and enhanced 3DNow!
The AMD/KryoTech combination, including 64Kb of integrated Level 1 cache and 256Kb of integrated Level 2 cache, costs $1,250 in a barebones configuration, and is available immediately.
Level 1 cache is cache memory built into the processor.
TriLevel Cache includes the standard 64KB of Level 1 cache, but also adds an internal full-speed backside 256KB Level 2 cache, and has a 100-MHz frontside bus to an optional external Level 3 cache on the Super7 motherboard of up to 1,024KB.
It will have 128 K of on-chip Level 1 cache and support for 512 K to 8 MB of Level 2 cache while running above 500 MHz.
It runs at 400 or 450 MHz and also has 32-K instruction and 32-K data Level 1 caches. In addition, it includes 256 K of on-core integrated L2 cache, Finally the chip supports up to 2 MB of optional Level 3 cache with the Super7 motherboard.