noise margin


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noise margin

(electronics)
The voltage difference between the guaranteed output level and the required input voltage level of a logic gate.
References in periodicals archive ?
A Schmitt-trigger-based single-ended 11T SRAM cell, which significantly improves read and write static noise margin (SNM) and consumes low power.
Regression analysis is then presented, with statistical analysis and hypothesis testing on the difference between the two means, of the noise margin, of the upstream and downstream cases in the interleaved mode setup completing the section.
The differential high output driver delivers 10% higher SNR than standard RS-485/422 devices, affording additional noise margin or extended cable lengths.
Digital circuits have a noise margin which can help to avoid small continuous wave interference (CWI); transient interference may be the main problem.
If the SSN exceeds the noise margin, the IC may experience a functional failure.
And just how much is too much, of course, depends on the received signal strength and how much noise margin is needed at the receiver.
It is critical to ensure that total noise caused by such sources does not exceed the noise margin that is determined by the gap between the range of input and output voltage swings.
Other topics include modeling of noise margin in SET logic, scalable tools for reliability analysis of large circuits, parallelization of DC analysis through multiport decomposition, and a CMOS low voltage charge pump.
These two ranges have a gap, called the noise margin, that is the acceptable amount of distortion allowed for the output signal before a bit is falsely read by the input receiver.
Advanced features monitor the noise margin, power level and attenuation, simply by scrolling up or down the navigation buttons.
The noise margin is denoted by the vertical opening of the eye, while sensitivity to timing errors (variations in the system sampling) is shown by the width or horizontal opening of the eye.