Transistor [M.sub.1] which is identical to [M.sub.A1] is used to reduce DC offset voltage
between Y and X terminals.
Note that the voltage difference, [DELTA][V.sub.REF] = [V.sub.REF1] - [V.sub.REF2], plays a dominant role in the offset voltage
because it is amplified by [1 + 2([R.sub.A]/[R.sub.G])] X ([R.sub.C]/[R.sub.B]).
Here the input offset voltage
of 700 millivolt is given as input in order to reduce the noise.
In addition, the dual-Hall element orthogonal coupling and spinning current technology was used to effectively lower the offset voltage
. Circuit offset was suppressed using autozeroed technology.
The nonlinearity indicates the input offset voltage
of the single slope ADC.
The resulted input offset voltage
can be expressed as
This causes toggling the output voltage polarity, but the offset voltage
remains a consistent bias on the output.
Comparison of Fig.2-4 shows that rectenna conversion efficiency for shunt rectifier configuration is independent of offset voltage
and is almost constant at any load.