This direct digital parallel conversion
technique achieves high precision and fidelity by avoiding the non-linearity caused by pulse width timing resolution limitations of silicon technology.
A parallel conversion
process will begin April 25 and full implementation is scheduled for the early third quarter of 1994.
Using a parallel conversion methodology, LACE converts hard macros and hard cores as well as hard IP like RAM, ROM, DRAM, datapaths, and microprocessors while preserving a design's hierarchy.
0 offers faster, parallel conversions of hard IP using
The loader supports the parallel conversion
of data types including EBCDIC to ASCII, supports a programmatic interface for integration with existing systems and real-time feeds, and includes a highly productive GUI for configuring conversions, loads and unloads.
Additionally, the increased speed makes the new devices ideal for high-speed serial to parallel conversion
, fast ATM switches, video control functions, and 3D graphics and imaging.