This comes about since the
parasitic current flowing through the Rns of row i is excessive for the OA (even though the feedback resistor, Rg, has been chosen so there is no saturation of voltages of the OA in the selected range of individual resistors).
If this process is interrupted, when the current is equal to zero, the
parasitic current pulses will be avoided, therefore the energy consumption will be reduced.
In these devices, the charging of native or deposited insulators may result in pinching off (i.e., reduction) of channel current and increases in
parasitic current leakage at the semi-conductor-insulator interfaces.
The electrical part benefits from the high level of integration and specific control of
parasitic currents made possible by the Silicon-On-Insulator technology in the company's proprietary BCD(3) manufacturing process.