parser


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Related to parser: Parser generator, XML parser

parser

[′pär·sər]
(computer science)
The portion of a computer program that carries out parsing operations.

parser

(language)
An algorithm or program to determine the syntactic structure of a sentence or string of symbols in some language. A parser normally takes as input a sequence of tokens output by a lexical analyser. It may produce some kind of abstract syntax tree as output. One of the best known parser generators is yacc.

parser

A routine that analyzes a continuous flow of text-based input and breaks it into its constituent parts. See parse.
References in periodicals archive ?
Various versions of the new algorithm were compared: (i) the baseline parsers without detection; (ii) detection without classification and the rule-based parser; (iii) the classifiers turned on, no rule-based parser; (iv) the full version, achieving the 6.
The existence of Verific's SystemVerilog Parser will further speed adoption of the language and allow new tools to be created sooner, as EDA companies can focus on their added value.
They leave that up to the respective parser and application developers.
Adds Michiel Ligthart, Verific's chief operating officer: "Startups such as Elastix well understand the need to stay focused on their core competencies which is why they turn to Verific for proven datastructures and netlist parsers.
Karen Pieper, Tabula's director of software, who has extensive experience parsing Verilog and VHDL, said : "Verific's SystemVerilog and VHDL parsers are among the best architected and implemented software packages in EDA.
The new 100GbE packet parser represents a novel approach to this class of network functions, delivering a unique combination of programmability and low latency currently not achievable on a programmable device.
Furthermore, it has a number of desired properties which are consistent with our long term goal--to use a broad coverage automatic parser as a model of the human parsing mechanism.
Verific Design Automation today announced that Achronix Semiconductor Corporation, developer of the world's fastest field programmable gate array (FPGA) called Speedster, uses Verific's Netlist-Only Parser in its Achronix CAD Environment (ACE).
advancing high-performance programmable logic solutions for network infrastructure systems, today announced the availability of the latest addition to its suite of high-performance packet processing solutions: the 100G Ethernet Packet Parser Reference Design Kit.
Advanced Email Parser (AEP) is an email extraction utility providing features to help extract every item of information from emails.
Next up is Big Blue's XML Parser for C and C++ (XP4C).
Verific's Netlist Parser Integrated With Concise Logic Optimization Systems