phase lock

phase lock

[′fāz ‚läk]
(electronics)
Technique of making the phase of an oscillator signal follow exactly the phase of a reference signal by comparing the phases between the two signals and using the resultant difference signal to adjust the frequency of the reference oscillator.
References in periodicals archive ?
It incorporates an NTSC/PAL video input port, integrated Analog-to-Digital Converter (ADC) with Phase Lock Loop (PLL) and LVDS transmitters.
Using fundamental DRO technology enhanced by a unique phase lock technique, these units exhibit desirable phase noise and micro-phonic performance while consuming very low power.
Although the UPS would run from the engine generator, the UPS rarely could phase lock synchronize to the engine generator and confirmed this with a constant "bypass not available" indication.
Advanced Frequency Synthesis by Phase Lock discusses both sigma-delta and fractional-nthe still-in-use forerunner to sigma-deltaemploying Simulink models and detailed simulations of results to promote a deeper understanding.
He then covers phase lock in noise including modulation by noise, response to phase noise, representations of additive noise, loop response to additive noise, phase-locked loop as a demodulator, parameter variation due to noise, cycle skipping due to noise, nonlinear operators in a locked loop, acquisition aids in the presence of noise, and bandlimited noise.
A standard phase lock voltage of 0 to +5 V DC may, in turn, be specified by the user to be anywhere in the 0 to +10 V range, and a TTL phase lock alarm is supplied (1 = locked, 0 = unlocked).
A digital phase lock loop (DPLL) is included on each port, and the board supports data rates up to 128K bps in burst mode.
Vector network analyzers typically utilize a source lock or tracking mode phase lock configuration.
PHOENIX -- NB4N507A integrated Phase Lock Loop (PLL) is a cost-effective, configurable precision timing solution for a wide variety of consumer and networking applications
The error signal is fed to the phase-lock section where it is amplified and filtered and used to drive the FM coil of the YIG oscillator to obtain phase lock.
At this frequency range, the SRD can sample the free running DRO and achieve phase lock.
The IC also has an integrated phase lock loop device that allows for bi-directional frequency synchronization for synchronizing multiple ISL6534s or various other controllers.