PLL

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PLL

(electronics)

PLL

PLL

(Phase-Locked Loop) An electronic circuit that compares an input frequency and phase to a reference signal. It then generates a voltage proportional to the difference between the input and the reference. PLLs are used in myriad digital and mixed mode (analog and digital) applications as regulators, demodulators, synchronizers and frequency multipliers and dividers. For example, in a superheterodyne FM radio, a PLL is used to lock the local oscillator to an accurate frequency reference such as a crystal or ceramic resonator. It can also be used to demodulate the FM audio and stereo subcarrier signals from the intermediate frequency (IF) stage. See heterodyning.


PLLs in an FM Radio
This example shows how PLLs are used for regulation and demodulation in an FM radio tuned to 101.5 MHz. The FM frequency range is 88-108 MHz, and this example uses a 10.7 MHz intermediate frequency (IF) and a 1 MHz reference frequency.
References in periodicals archive ?
Pasternack, a leading provider of RF, microwave and millimetre wave products, has unveiled a new line of phase locked oscillators (PLO) that deliver accurate and stable output frequencies with low phase noise and spurious performance, making them ideal for use in radar and other exciter or frequency generation applications.
Frequency acquisition techniques for phase locked loop.
The SFDRO Series frequency phase locked oscillators are designed to accommodate as many as six discrete frequency levels in one unit.
0 GHz phase locked oscillators employ a unique technique to phase-lock microwave DROs to a 5 or 10 MHz crystal reference.
This first demonstration of an optical clock with a microwave output, reported in the August 3 issue of Science, involves an optical frequency standard coupled to a new optical-frequency synthesizer that bridges an octave in the optical spectrum and provides for a direct microwave output that is phase locked to the optical standard.
The 2 measures of 40-Hz EEG analyzed were (a) evoked 40 Hz, which is phase locked to stimulus onset, and (b) induced 40 Hz, which is not phase locked to the stimulus.
Both outputs have a maximum 40/60 duty cycles and are phase locked to one of two selected input references.
When DROs are phase locked to a clean, stable crystal reference, their noise performance reaches an unmatched level.
National Semiconductor has announced the addition of two frequency synthesizers to its PLLatinum line of phase locked loops (PLLs) for wireless infrastructure applications.
In the source lock mode, the local oscillators in the test set are phase locked to a precise reference.
Its core YIG technology is ideally suited to a wide range of applications, such as free-running and phase locked oscillators in narrow and wide band configurations, band-pass and band-reject filters, narrow and wide band frequency synthesizers and converters as well as highly integrated front-end modules for radio and instrumentation applications.
The fundamental mm-wave phase-locked DRO is based upon a fundamental voltage tuned DRO at the output frequency locked to a reference signal via a proprietary sampling phase locked loop, as shown in Figure 1.