phase-locked loop


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phase-locked loop

[′fāz ¦läkt ′lüp]
(electronics)
A circuit that consists essentially of a phase detector which compares the frequency of a voltage-controlled oscillator with that of an incoming carrier signal or reference-frequency generator; the output of the phase detector, after passing through a loop filter, is fed back to the voltage-controlled oscillator to keep it exactly in phase with the incoming or reference frequency. Abbreviated PLL.
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References in periodicals archive ?
Assume a second-order phase-locked loop with one zero (probably the most common configuration).
This cross over is the optimum setting for the phase-locked loop response.
Since the zero is of the same order of magnitude as the poles, the magnitude of the frequency response far away from the cut-off frequency will be expected to decrease at a rate of 20 dB per decade even though it is a second-order phase-locked loop.
micro]), taking into account the effects of the phase-locked loop.
There is a slight increase in phase noise near the phase-locked loop bandwidth due to the fact that the reference phase noise is attenuated by only 20 dB per decade.
tot3dB] = total composite noise power at the phase-locked loop bandwidth
ref3dB] = multiplied reference noise at the phase-locked loop bandwidth
The effect of high stability reference oscillators on system phase noise
Chapter 4 discusses continuous phase-locked loops, where the loop must function over wide bandwidths.
Frequency Synthesizer Design Handbook

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