ripple-carry adder

ripple-carry adder

[′rip·əl ¦kar·ē ‚ad·ər]
(computer science)
A device for addition of two n-bit binary numbers, formed by connecting n full adders in cascade, with the carry output of each full adder feeding the carry input of the following full adder.
References in periodicals archive ?
The ripple-carry adder is relatively slow; each full adder must wait for the carry bit to be calculated from the previous full adder.
Power minimization of 10t full adder using sub-microntechnique & pfalfull adder using adiabatic logic
An n-bit ripple-carry adder is implemented using n/2+2 CLBs and has a total fixed delay of 4.
A review of modular multiplication methods and respective hardware implementations
Conventionally, CSL is implemented with dual ripple-carry adder (RCA) with the carry-in of 0 and 1, respectively.
Design of fast adders with optimal placement and routing in FPGAs using muxed AOI logic
Encyclopedia browser ?
Full browser ?