shift register


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shift register

[′shift ‚rej·ə·stər]
(computer science)
A computer hardware element constructed to perform shifting of its contained data.
McGraw-Hill Dictionary of Scientific & Technical Terms, 6E, Copyright © 2003 by The McGraw-Hill Companies, Inc.

shift register

A high-speed circuit that holds some number of bits for the purpose of shifting them left or right. It is used internally within the processor for multiplication and division, serial/parallel conversion and various timing considerations. See register.
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References in periodicals archive ?
The shift register filling operates on the Clk_2kHz falling edges, avoiding the 10 [micro]s delay in the bitstream generation.
"Analysis of DICE latch based shift register", Circuit Power and Computing Technologies (ICCPCT) 2016 International Conference on, pp: 1-5.
With respect to case ii) and iii), to right shift the product once, a 47-bit reversible right shift register is required.
The shift register was realized by 12 flip-flops with the feedback structure of Fibonacci type [9].
Circuit of the Quantum Shift Register. The quantum shift register circuit is represented by a set of input qubits, memory qubits, a set of output qubits, and updated memory qubits.
In case of a hybrid solution, at each iteration, the results of the partial sum of the FIR outputs are fed back to the sum shift register block in Figure 5 and added coherently to the current value at a given iteration.
The shift register is responsible for selectively enabling a single prediction state, thus only one bit in the shift register should ever have a value of 1.
A linear feedback shift register includes two parts: one shifting registry composed of one string of bits whose number determines the length of the registry and a feedback function.
Output current is adjustable (up to 100 mA/channel) using an external resistor ([R.sub.EXT]), and the serial interface with Schmitt trigger inputs includes an integrated shift register. Additionally, an internal data register stores the currently displayed data.
All boundary scan cells are combined in a shift register with parallel inputs and outputs and generate the serial scan path.
Other features include low charge injections to obtain clearer images and a faster frame rate, 22-ohm switch resistance that minimizes the return signal attenuation and a CMOS serial shift register that minimizes I/O connections and power dissipation.
Products are tracked throughout the system using a shift register, with optional print and code monitoring controls available to guarantee total product security at all times.