sigma-delta modulator


Also found in: Acronyms.

sigma-delta modulator

[‚sig·mə ‚del·tə ′mäj·ə‚lād·ər]
(electronics)
The circuit used to generate a pulse stream in a sigma-delta converter. Also known as delta-sigma modulator.
McGraw-Hill Dictionary of Scientific & Technical Terms, 6E, Copyright © 2003 by The McGraw-Hill Companies, Inc.
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The rest of this paper is organized as follows: in Section 2, a generalized structure of Sigma-Delta modulator is introduced; in Section 3, the proposed fractional-order Sigma-Delta modulator is discussed; then PSO algorithm for fractional-order Sigma-Delta modulator is presented in Section 4.
Mathematical Model of the Sigma-Delta Modulator System
Before discussing the proposed fractional-order Sigma-Delta modulator, a general system block diagram of Sigma-Delta modulator is shown in Figure 1, which illustrates a typical architect of Sigma-Delta modulator.
So, Figure 1 presents a MEMS accelerometer-based 4th-order Sigma-Delta modulator, where the 2nd-order digital integrator H(z) is inserted between AFE and 1-bit comparator; [K.sub.1] is the quantizer gain; [Q.sub.1] is the quantization noise of 1-bit quantizer, and [K.sub.2] is the equivalent linear model of 1-bit DAC feedback.
The AD7403 isolated sigma-delta modulator achieves an 81-dB Signal-to-Noise And Distortion ratio (SINAD) (min) @ 78 KSPS over a -40Cdeg to +125Cdeg temperature range, which is 11 dB higher than competing devices.
AD7403 Sigma-Delta Modulator integrates ADI's iCoupler Digital Isolation Technology
The AD7403 isolated sigma-delta modulator integrates ADI's iCoupler digital isolation technology, creating a single-chip solution for measuring the voltage across a shunt resistor by converting an analog signal into a 1-bit data stream that can be clocked at up to 20 MHz.
Figure 2 shows the block diagram of the proposed modified cascaded sigma-delta modulator. The 4th order modified cascaded [SIGMA]-[DELTA] modulator architecture employs two key design approaches.
The simulated integrator outputs histograms of the 4th order cascaded sigma-delta modulator with -4dB/2.5 MHz sine wave input is shown in figure.
Huang, 2001, "A 13.5mW 185-Msample/s sigma-delta modulator for UMTS/GSM dual-standard IF Reception", IEEE J.
isolated sigma-delta modulators ACPL-796J and ACLP-C799 from Broadcom (Figure 4) are two types of sigma-delta modulators, based on the fact that the clock source is internally incorporated or supplied externally to the modulator.