triple modular redundancy


Also found in: Acronyms, Wikipedia.

triple modular redundancy

[′trip·əl ′mäj·ə·lər ri′dən·dən·sē]
(computer science)
A form of redundancy in which the original computer unit is triplicated and each of the three independent units feeds into a majority voter, which outputs the majority signal.
McGraw-Hill Dictionary of Scientific & Technical Terms, 6E, Copyright © 2003 by The McGraw-Hill Companies, Inc.
References in periodicals archive ?
Chandra, "Design and Analysis of a Fault Tolerant Microprocessor Based on Triple Modular Redundancy Using VHDL," International Journal of Advances in Engineering & Technology (IJAET), vol.
Yuan, "Triple Modular Redundancy (TMR) in a configurable fault tolerant processor (CFTP) for space applications," December 2003.
Reorda, "On the optimal design of triple modular redundancy logic for SRAM-based FPGAs," in Proceedings of the Design, Automation and Test in Europe (DATE '05), pp.