wafer


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wafer

1. Christianity a thin disc of unleavened bread used in the Eucharist as celebrated by the Western Church
2. Pharmacol an envelope of rice paper enclosing a medicament
3. Electronics a large single crystal of semiconductor material, such as silicon, on which numerous integrated circuits are manufactured and then separated

wafer

[′wā·fər]
(electronics)
A thin semiconductor slice on which matrices of microcircuits can be fabricated, or which can be cut into individual dice for fabricating single transistors and diodes.
(engineering)
A flat element for a process unit, as in a series of stacked filter elements.

wafer

(1) A small continuous-loop magnetic tape cartridge that was used from time to time for data storage. See Stringy Floppy.

(2) The base unit of chip making. A wafer is a slice taken from a salami-like silicon crystal ingot up to 450 mm (17.7") in diameter. The larger the wafer, the more chips produced in a single production pass, which comprises a series of photomasking, etching and implantation steps. Wafers are approximately 1/30th of an inch thick; however, the actual layers of transistors that make up the active circuitry are only a few microns deep.

Wafers started out being very small from one to three inches in diameter. Then came 100mm ingots (3.9"), followed by 125, 150, 200 and 300mm. Various wafer sizes are used today depending on the type of chip being made. See chip and wafer scale integration.


The Boule Is Sliced
The silicon ingot, which is known as a "boule," is sliced into wafers. (Image courtesy of IBM.)








Different Sizes
The person at the top is holding 150mm wafers; in the middle 200mm; and 300mm at the bottom. (Images courtesy of Texas Instruments, Inc., Advanced Micro Devices, Inc. and Intel Corporation, respectively).


Different Sizes
The person at the top is holding 150mm wafers; in the middle 200mm; and 300mm at the bottom. (Images courtesy of Texas Instruments, Inc., Advanced Micro Devices, Inc. and Intel Corporation, respectively).


Different Sizes
The person at the top is holding 150mm wafers; in the middle 200mm; and 300mm at the bottom. (Images courtesy of Texas Instruments, Inc., Advanced Micro Devices, Inc. and Intel Corporation, respectively).








Heating the Wafers
The red glow comes from a furnace that reaches 1000 degrees centigrade. The semiconductor wafers are baked in the oven to prepare them for the chip-making process. (Image courtesy of Intel Corporation.)
References in periodicals archive ?
2], allowing it to return to its gaseous phase and leaving the wafer dry and residue-free.
SOI wafers, like prime wafers, can contain yield-killing void defects at the surface of the SOI wafer.
Incorporating the proven Stratus process cell design, Stratus 200/300 offers multiple wafer size capability plus the added feature of rapid size change with minimal downtime.
These statements include, but are not limited to, those associated with the shipment of product to the aforementioned silicon wafer supplier, the effect of ADE products on customer product quality and production rates, and expected 300mm silicon wafer demand.
Separation-by-IMplantation-of-OXygen (SIMOX) refers to a technique used to manufacture SOI wafers where an oxygen implanter and an annealing process are used to create a very thin insulating layer within the wafer, just below a thin layer of silicon on the top of the wafer.
Ibis Technology Corporation (Nasdaq NM: IBIS), a leading provider of SIMOX-SOI implantation equipment to the worldwide semiconductor industry, today announced the receipt of an order for an Ibis i2000 oxygen implanter from SUMCO, a leading manufacturer of silicon wafers.
Healy and Misra plan to focus on developing partnerships with leading semiconductor companies who will be implementing the Cubic Wafer process for developing highly integrated circuits (ICs) for breakthrough applications while enhancing production and dramatically reducing costs.
We are extremely pleased with the WaferMate(TM) workcells, and excited about the opportunities that they will offer to expand our market in the automated wafer handling industry" says Scott Klimczak, president of CHAD Industries.
All quartz wafers for CMP tools have an embedded wear indicator to ease wear monitoring & reduce wafer breakage.
Nasdaq:FORM) today announced delivery of it's latest product for enabling breakthrough wafer test performance and throughput in the emerging System-on-Chip (SoC) flip chip market.
ASE) (TAIEX: 2311) (NYSE: ASX), the world's largest semiconductor packaging and test company, and FlipChip International, LLC (FCI), the global leader in flip chip bumping and wafer level packaging technology, today announced they have signed an expanded technology licensing agreement.