What the user wants to do is avoid wait states
between when a function is pressed and the screen responds.
The more processors we want to put on, the more wait states
we incur, and the more performance we steal from each processor.
The processor runs at a certain speed, usually 10 to 33 MHz, with or without wait states
(when the processor stops processing to catch up with slow memory).
RISC architecture limits are expected to be reached when it is no longer possible to get RAMs that are fast enough to read at one cycle and it becomes necessary to begin designing things like wait states
into memory accesses.
Running from RAM with zero wait states
, the benchmark cruises to a CoreMark/MHz in excess of 3.
Compared to previous 45nm technologies on record, the new platform reduces the leakage current that occurs when current is wasted in wait states
to one-fifth that of previous levels and reduces interconnect-induced lag times by approximately 14%.
Based on the Intel 33-megahertz 80386 microprocessor, the Z-386/33E operates at zero wait states
and is designed for disk-intensive applications in single and multi-user environments.
The AS8F2M32 offers an access time of 90 ns, allowing high-speed microprocessors to operate without wait states
. To eliminate bus contention, the device has separate chip enable (CE\), write enable (WE\) and output enable (OE\) controls.
The no-wait feature eliminates the need for wait states
between Read and Write operations.